Microelectronics Research Center

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Polymer-filled Optical Through-Wafer Interconnects for Heterogeneous 3-D Microsystem Integration
Ashley Carson, Biosystems Engineering, Clemson University
NNIN REU Site: Microelectronics Research Center, Georgia Institute of Technology
Kevin Martin, Georgia Institute of Technology
Hiren Thacker, Electrical and Computer Engineering, Georgia Institute of Technology

Interconnects are the primary limiter to improving the performance of integrated circuits. Three-dimensional integration has the potential to alleviate this problem, through shortening the length of the interconnects. In addition, there is growing interest in building heterogeneous microsystems with combined electrical and optical functionality. The focus of this project is the fabrication and demonstration of polymer-filled optical through-wafer interconnects as a building block for heterogeneous 3-D microsystems. 55μm-wide vias were etched in 400um thick silicon wafers and filled with AvatrelTM 2580-20 polymer. Filling the vias with polymer helps create index-matched optical transmission paths. The polymer was characterized to have an optical loss of ~3dB/cm . Polishing was used to reduce surface roughness of the polymer-filled vias to under 1μm. Successful transmission of optical signals through the interconnects was demonstrated. The polymer-filled vertical optical interconnects, when combined with other optical elements, and fabricated alongside vertical electrical interconnects can provide an exceptional heterogeneous 3-D interconnect solution.



Characterization of Polymer Properties for Use as Pillar-Like Electrical-Optical I/O Interconnects
Laura Doyle, Biomedical Engineering, Johns Hopkins University
NNIN REU Site: Microelectronics Research Center, Georgia Tech
REU Principle Investigator: Paul Kohl, Chemical Engineering, Georgia Tech
REU Mentor: Ate He, Chemical Engineering, Georgia Tech

Polynorbornene-based polymers have long been considered desirable materials for electrical-optical interconnects due to their low dielectric constants, high indices of refraction, low elastic moduli, and photodefinability. In recent developments, polymer pillars have been coupled with metallic conductors to transmit electrical and optical signals. These more complicated structures require precisely constructed features. For optical interconnects, the sidewalls of the pillars should be smooth to reduce scattering and subsequent optical losses. For electrical applications, interior cavities should be cleanly developed down to the underlying surface to ensure reliable electrical contacts. Choosing an appropriate polymer formula is essential to obtain these results. Each formula yields different results in fabrication, so preliminary tests are necessary to determine the optimal material for each application.Three different formulas of the polynorbornene polymer Avatrel were tested under different exposure doses, post exposure bake temperatures, and durations. The formula that developed best overall with respect to structural perpendicularity, smoothness, depth of interior development, and top surface flatness was then further tested in fabrication applications. Through these fabrication processes, it was shown that the chosen formula can be used to create smooth 130μm tall pillars for optical uses and filled with copper for solid electrical connections between wafers.

Electrical, Optical, and Thermofluidic Wafer-Level Chip I/O Interconnects Enabled by Nano/Microimprint Lithography
Wand Gan, Biochemistry, University of Florida
REU Site: Georgia Institute of Technology
Kevin Martin, Electrical & Computer Engineering, Georgia Institute of Technology
Muhannad Bakir, Electrical & Computer Engineering, Georgia Institute of Technology

The increasing demands of silicon microprocessor technology on power delivery (>400A), chip input/output (I/O) bandwidth (>50 Tbs), and heat removal (200W/cm2), have affected a need for the development of compatible electrical, optical and thermofluidic chip I/O interconnections (or multimodal I/O). The goal of this project is to develop low cost wafer-level batch fabrication techniques for multimodal I/O interconnections using nano/microimprint lithography technology. The fabrication of these structures involves spin coating and soft baking a thick, photodefinable polymer film, subsequently transforming the surface topology of the film using nano/microimprinting, and finally UV irradiation through a pattered mask, followed by hard baking and spray developing. General fabrication techniques for nano/microimprinting have been developed, both in template fabrication, with features as deep as 25 ?m, and in demolding, for which various anti-adhesion layers have been tested. We have successfully produced the following unique interconnect structures: (1) surface-normal optical waveguides terminating in mirrored tips to be used as dual-mode pins, transmitting electrical and optical signals simultaneously, (2) board level, funnel-shaped sockets to hold and align dual-mode polymer pins, and (3) thermofluidic back-side heat sinks compatible with dual-mode pins. The development of these processes has also introduced the possibility of using nano/microimprint lithography in further applications.

New Techniques for Generating Core/Shell Nanoparticles
Jacob Hughey, Biomedical Engineering and Mathematics, Vanderbilt University
Site: Georgia Institute of Technology
Mostafa A. El-Sayed, School of Chemistry and Biochemistry, Georgia Institute of Technology
Susie Eustis, Laser Dynamics Laboratory, School of Chemistry and Biochemistry, Georgia Institute of Technology

The outstanding potential of core/shell nanoparticles stems in large part from the ability to obtain structures with combinations of properties that neither individual material possesses. This research focused on the synthesis of a gold shell on spherical silica nanoparticles. Although spherical gold nanoparticles generally have a surface plasmon resonance at a wavelength of about 520 nm, a core/shell configuration offers a more highly tunable plasmon wavelength depending on the thickness of the shell, the diameter of the core, and the ratio between the two. While silica core/ gold shell nanoparticles have been fabricated previously by chemical reduction of a gold salt, our work attempted to generate these structures by photochemical reduction and by nanosphere lithography. These techniques have the possibility of providing finer control of the properties of the gold shell compared to the chemical reduction method. Optical spectroscopy and electron microscopy were used in the characterization of these nanoshells.

Nanoscale Surface Acoustic Wave Sensors for Early Cancer Detection
Wafa Soofi, Bioengineering, Rice University
REU Site: Georgia Institute of Technology
Dr. William D. Hunt, Electrical Engineering, Georgia Institute of Technology
Christopher Corso, Biomedical Engineering, Georgia Institute of Technology

The variety of research areas involving applications of surface acoustic wave (SAW) devices has recently been extended to include the field of biosensor technology. The velocity of the surface acoustic waves, and thus the operating frequency, is dependent upon the mass density of the device. A biolayer containing antibodies directed against cancer cell proteins is added to the SAW device. If these proteins are present in the environment so that binding to the antibodies occurs, a change in mass of the device and a subsequent change in operating frequency results. This change can then be detected by interrogating the device with a radio frequency (RF) signal, which is reflected back via an input/output interdigital transducer so that the signal can then be analyzed for perturbations caused by binding effects within the biolayer. Presently, the SAW device understructure has been fabricated using e-beam lithography and tested for response to electrical probing. Ultimate goals include addition and testing of the biolayer and antenna for RF interrogation.



Nanoscale Gray-Scale Lithography And Pattern Transfer
Yin Yang; Electrical Engineering; University of Virginia
REU SITE:Georgia Institute of Technology
Kevin Martin, Microelectronics Research Center; Georgia Institute of Technology
Raghunath Murali, Microelectronics Research Center; Georgia Institute of Technology

The relevance of gray-scale lithography is a consequence of demand for applications in optics, nanoimprinting, and M/NEMS (micro/nano-electromechanical systems). M/NEMS requires 3-D structures for mechanical motion, whereas conventional lithographic techniques are optimized for binary, or 2-D, patterns. Two primary methods of gray-scale patterning currently exist: use of a gray-scale mask in optical lithography or a direct write electron-beam lithography (EBL) system. Each creates a 3-D resist profile by varying the incident energy at different locations of the resist, thus producing differential solubility rates. These features can be further amplified (and transferred) to the substrate through deep reactive ion etching. Our goal, through EBL, is to produce a blazed grating, a diffractive optical device sensitive to a single peak wavelength upon incident polychromatic light. Such a design requires a saw tooth profile, very much feasible through our EBL system. Limitations of EBL arise out of proximity effects, where electrons expose patterns far away from their point of incidence. A proximity correction method is employed to achieve the ideal design.